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INTEGRATED CIRCUITS
DATA SHEET
SAA5264; SAA5265 10 and 1 page intelligent teletext decoders
Preliminary specification Supersedes data of 1999 Oct 05 File under Integrated Circuits, IC02 2000 Jan 27
Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
FEATURES The following features apply to both SAA5264 and SAA5265: * Complete 625 line teletext decoder in one chip reduces printed circuit board area and cost * Automatic detection of transmitted fastext links or service information (packet 8/30) * On-Screen Display (OSD) for user interface menus using teletext and dedicated menu icons * Video Programming System (VPS) decoding * Wide Screen Signalling (WSS) decoding * Pan-European, Cyrillic, Greek/Turkish and French/Arabic character sets in each chip * High-level command interface via I2C-bus gives easy control with a low software overhead * High-level command interface is backward compatible to Stand-Alone Fastext And Remote Interface (SAFARI) * 625 and 525 line display * RGB interface to standard colour decoder ICs, current source * Versatile 8-bit open-drain Input/Output (I/O) expander, 5 V tolerant * Single 12 MHz crystal oscillator * 3.3 V supply voltage. SAA5264 features * Automatic detection of transmitted pages to be selected by page up and page down * 8 Page fastext decoder * Table Of Pages (TOP) decoder with Basic Top Table (BTT) and Additional Information Tables (AITs) * 4 Page user-defined list mode.
SAA5264; SAA5265
GENERAL DESCRIPTION The SAA5264 is a single-chip ten page 625-line World System Teletext decoder with a high-level command interface, and is SAFARI compatible. The SAA5265 is a single-chip one page version of the SAA5264. Both devices are designed to minimize the overall system cost, due to the high-level command interface offering the benefit of a low software overhead in the TV microcontroller. The SAA5264 has the following functionality: * 10 page teletext decoder with OSD, Fastext, TOP, default and list acquisition modes * Automatic channel installation support * Closed caption acquisition and display * Violence Chip (VChip) support. The SAA5265 has the following functionality: * 1 Page teletext decoder with OSD, fastext and default acquisition modes * Automatic channel installation support * Closed caption acquisition and display * VChip support * No EEPROM fitted (there is no list mode feature).
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
ORDERING INFORMATION TYPE NUMBER(1) NAME SAA5264PS/M3/nnnn SAA5265PS/M4/nnnn Note 1. `nnnn' is a unique four digit number denoting the software version. QUICK REFERENCE DATA SYMBOL VDDX IDDP IDDC IDDA fxtal(nom) Tamb Tstg Note PARAMETER all supply voltages periphery supply current core supply current analog supply current nominal crystal frequency ambient temperature storage temperature CONDITIONS referenced to VSS note 1 normal mode idle mode normal mode idle mode fundamental mode SDIP52 SDIP52 PACKAGE DESCRIPTION
SAA5264; SAA5265
VERSION SOT247-1 SOT247-1
plastic shrink dual-in-line package; 52 leads (600 mil) plastic shrink dual-in-line package; 52 leads (600 mil)
MIN. 3.0 1 - - - - - -20 -55
TYP. 3.3 - 15 4.6 45 0.87 12 - -
MAX. 3.6 - 18 6 48 1 - +70 +125
UNIT V mA mA mA mA mA MHz C C
1. Periphery supply current is dependent on external components and I/O voltage levels.
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
BLOCK DIAGRAM
SAA5264; SAA5265
handbook, full pagewidth
I2C-bus, general I/O
TV CONTROL AND INTERFACE
ROM
MICROCONTROLLER (80C51)
SRAM
DRAM
MEMORY INTERFACE
SAA5264 SAA5265
R CVBS DATA CAPTURE DISPLAY G B VDS
CVBS
DATA CAPTURE TIMING
DISPLAY TIMING
GSA018
VSYNC HSYNC
Fig.1 Block diagram.
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
PINNING SYMBOL PIN TYPE DESCRIPTION
SAA5264; SAA5265
Port 2: 8-bit programmable bidirectional port with alternative functions P2.0/PWM P2.1/PWM0 P2.2/PWM1 P2.3/PWM2 P2.4/PWM3 P2.5/PWM4 P2.6/PWM5 P2.7/PWM6 1 2 3 4 5 6 7 8 I/O I/O I/O I/O I/O I/O I/O I/O output for 14-bit high precision Pulse Width Modulator (PWM) outputs for 6-bit PWMs 0 to 6
Port 3: 8-bit programmable bidirectional port with alternative functions P3.0/ADC0 P3.1/ADC1 P3.2/ADC2 P3.3/ADC3 P3.4/PWM7 VSSC SCL(NVRAM) SDA(NVRAM) P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 VSSA CVBS0 CVBS1 SYNC_FILTER IREF FRAME TEST COR 9 10 11 12 30 13 I/O I/O I/O I/O I/O - I I/O I/O I/O I/O I/O I/O I/O - I I I I O I O I/O - O input/output for general use analog ground Composite Video Baseband Signal (CVBS) input; a positive-going 1 V (peak-to-peak) input is required; connected via a 100 nF capacitor sync-pulse-filter input for CVBS; this pin should be connected to VSSA via a 100 nF capacitor reference current input for analog circuits; for correct operation a 24 k resistor should be connected to VSSA Frame de-interlace output synchronized with the VSYNC pulse to produce a non-interlaced display by adjustment of the vertical deflection circuits not available; connect this pin to VSSA contrast reduction: open-drain, active LOW output which allows selective contrast reduction of the TV picture to enhance a mixed mode display P3.4/PWM7 (described above) analog supply voltage (3.3 V) Blue colour information pixel rate output 5 output for 6-bit PWM7 core ground I2C-bus Serial Clock input to Non-Volatile RAM I2C-bus Serial Data input/output (Non-Volatile RAM) input/output for general use input/output for general use input/output for general use 8 mA current sinking capability for direct drive of Light Emitting Diodes (LEDs) inputs for the software Analog-to-Digital-Converter (ADC) facility
Port 0: 8-bit programmable bidirectional port 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 VDDA B 2000 Jan 27 31 32
Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
SAA5264; SAA5265
SYMBOL G R VDS HSYNC
PIN 33 34 35 36
TYPE O O O I
DESCRIPTION Green colour information pixel rate output Red colour information pixel rate output video/data switch push-pull output for pixel rate fast blanking horizontal sync pulse input: Schmitt triggered for a Transistor Transistor Level (TTL) version; the polarity of this pulse is programmable by register bit TXT1.H POLARITY vertical sync pulse input; Schmitt triggered for a TTL version; the polarity of this pulse is programmable by register bit TXT1.V POLARITY periphery ground core supply voltage (+3.3 V) crystal oscillator ground 12 MHz crystal oscillator input 12 MHz crystal oscillator output reset input; if this pin is HIGH for at least 2 machine cycles (24 oscillator periods) while the oscillator is running, the device resets; this pin should be connected to VDDP via a capacitor periphery supply voltage (+3.3 V)
VSYNC VSSP VDDC OSCGND XTALIN XTALOUT RESET
37 38 39 40 41 42 43
I - - - I O I
VDDP P1.0 P1.1 P1.2 P1.3 SCL SDA P1.4 P1.5
44
- I/O I/O I/O I/O I I/O I/O I/O
Port 1: 8-bit programmable bidirectional port 45 46 47 48 49 50 51 52 input/output for general use input/output for general use input/output for general use input/output for general use I2C-bus Serial Clock input from application I2C-bus Serial Data input/output (application) input/output for general use input/output for general use
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
SAA5264; SAA5265
handbook, halfpage
P2.0/PWM P2.1/PWM0 P2.2/PWM1 P2.3/PWM2 P2.4/PWM3 P2.5/PWM4 P2.6/PWM5 P2.7/PWM6 P3.0/ADC0
1 2 3 4 5 6 7 8 9
52 P1.5 51 P1.4 50 SDA 49 SCL 48 P1.3 47 P1.2 46 P1.1 45 P1.0 44 VDDP 43 RESET 42 XTALOUT 41 XTALIN 40 OSCGND 39 VDDC 38 VSSP 37 VSYNC 36 HSYNC 35 VDS 34 R 33 G 32 B 31 VDDA 30 P3.4/PWM7 29 COR 28 TEST 27 FRAME
GSA016
P3.1/ADC1 10 P3.2/ADC2 11 P3.3/ADC3 12
SAA5264 VSSC 13 SAA5265
SCL(NVRAM) 14 SDA(NVRAM) 15 P0.2 16 P0.3 17 P0.4 18 P0.5 19 P0.6 20 P0.7 21 VSSA 22 CVBS0 23 CVBS1 24 SYNC_FILTER 25 IREF 26
Fig.2 Pin configuration.
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
HIGH LEVEL COMMAND INTERFACE
SAA5264; SAA5265
The I2C-bus interface is used to pass control commands and data between the SAA5264/SAA5265 and the television microcontroller. The interface uses high-level commands, which are backward compatible with the SAFARI. The I2C-bus transmission formats are: Table 1 START Table 2 START Table 3 START User command I2C-BUS ADDRESS System command I2C-BUS ADDRESS WRITE User read I2C-BUS ADDRESS READ ACK DATA ACK STOP ACK COMMAND ACK PARAMETER ACK STOP WRITE ACK COMMAND ACK STOP
CHARACTER SETS The following standard character sets are included in the SAA5264 and in the SAA5265: Set 0 = Pan-European Set 1 = Cyrillic Set 2 = Greek/Turkish Set 3 = French/Arabic If you require any other character sets, please discuss them with your local Regional Sales Office first. LIMITING VALUES In accordance with Absolute Maximum Rating System (IEC 60134). SYMBOL VDDX VI VO IO IIO(d) Tamb Tstg Note 1. This maximum value refers to 5 V tolerant I/Os and may be 6 V maximum but only when VDD is present. PARAMETER all supply voltages input voltage (any input) output voltage (any output) output current (each output) diode DC input or output current ambient temperature storage temperature note 1 note 1 CONDITIONS MIN. -0.5 -0.5 -0.5 - - -20 -55 +4.0 VDD + 0.5 or +4.1 VDD + 0.5 10 20 +70 +125 MAX. V V V mA mA C C UNIT
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
CHARACTERISTICS VDD = 3.3 V 10%; VSS = 0 V; Tamb = -20 to +70 C; unless otherwise specified. SYMBOL Supplies VDDX IDDP IDDC IDDC(idle) IDDA IDDA(idle) all supply voltages periphery supply current core supply current idle mode core supply current analog supply current idle mode analog supply current normal mode referenced to VSS note 1 normal mode 3.0 1 - - - - 3.3 - 15 4.6 45 0.87 PARAMETER CONDITIONS MIN. TYP.
SAA5264; SAA5265
MAX.
UNIT
3.6 - 18 6 48 1
V mA mA mA mA mA
Digital inputs RESET (PIN 43) VIL VIH Vhys ILI Rpd(eq) LOW-level input voltage HIGH-level input voltage Schmitt trigger input hysteresis voltage input leakage current equivalent pull-down resistance VI = 0 VI = VDD - 1.85 0.44 - - - - - 1.00 - 0.58 0.17 92.45 V V V A k
55.73 70.71
HSYNC, VSYNC (PINS 36 AND 37) VIL VIH Vhys ILI LOW-level input voltage HIGH-level input voltage Schmitt trigger input hysteresis voltage Input leakage current VI = 0 to VDD - 1.80 0.40 - - - - - 0.96 - 0.56 0.00 V V V A
Digital outputs FRAME, VDS (PINS 27 AND 35) VOL VOH to(r) to(f) LOW-level output voltage HIGH-level output voltage output rise time output fall time IOL = 3 mA IOH = 3 mA - 2.84 - - 8.85 7.97 0.13 - 10.90 10.00 V V ns ns
between 10% and 7.50 90%; CL = 70 pF between 10% and 6.70 90%; CL = 70 pF
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
SAA5264; SAA5265
SYMBOL
PARAMETER
CONDITIONS
MIN. - 2.84 - 0.00 - - - - - 8.64 7.34
TYP.
MAX.
UNIT
COR (OPEN-DRAIN OUTPUT, PIN 29) VOL VOH(pu) VIL VIH ILI to(r) to(f) LOW-level output voltage HIGH-level pull-up output voltage LOW-level input voltage HIGH-level input voltage input leakage current output rise time output fall time VI = 0 to VDD IOL = 3 mA IOL = -3 mA; push-pull 0.14 - 0.00 5.50 0.12 11.10 9.40 V V V V A ns ns
-
between 10% and 7.20 90%; CL = 70 pF between 10% and 4.90 90%; CL = 70 pF
Digital input/outputs SCL(NVRAM), SDA(NVRAM), P0.4, P0.7, P1.0, P1.1, P2.1 TO P2.7, P3.0 TO P3.4 (PINS 14, 15, 18, 21, 45, 46, 2 TO 12, 30) VIL VIH Vhys ILI VOL VOH to(r) LOW-level input voltage HIGH-level input voltage Schmitt trigger input hysteresis voltage input leakage current LOW-level output voltage HIGH-level output voltage output rise time VI = 0 to VDD IOL = 4 mA IOH = -4 mA push-pull - 1.78 0.41 - - 2.81 - - - - - - 8.47 0.98 - 0.55 0.01 0.18 - 10.70 V V V A V V ns
between 10% and 6.50 90%; CL = 70 pF push-pull between 10% and 5.70 90%; CL = 70 pF - 1.80 0.42 VI = 0 to VDD -
to(f)
output fall time
7.56
10.00
ns
P1.2, P1.3, P2.0 (PINS 47, 48, 1) VIL VIH Vhys ILI LOW-level input voltage HIGH-level input voltage Schmitt trigger input hysteresis voltage input leakage current - - - - 0.99 - 0.56 0.02 V V V A
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
SAA5264; SAA5265
SYMBOL VOL VOH to(r)
PARAMETER LOW-level output voltage HIGH-level output voltage output rise time
CONDITIONS IOL = 4 mA IOH = -4 mA push-pull
MIN. - 2.81 - - 8.47
TYP. 0.17 - 10.50
MAX.
UNIT V V ns
between 10% and 7.00 90%; CL = 70 pF push-pull between 10% and 5.40 90%; CL = 70 pF - 1.82 VI = 0 to VDD - 0.42 IOL = 8 mA IOH = -8 mA push-pull - 2.76
to(f)
output fall time
7.36
9.30
ns
P0.5, P0.6 (PINS 19, 20) VIL VIH ILI Vhys VOL VOH to(r) LOW-level input voltage HIGH-level input voltage input leakage current Schmitt trigger input hysteresis voltage LOW-level output voltage HIGH-level output voltage output rise time - - - - - - 8.22 0.98 - 0.11 0.58 0.20 - 8.80 V V A V V V ns
between 10% and 7.40 90%; CL = 70 pF push-pull between 10% and 4.20 90%; CL = 70 pF - 1.99 0.49 VI = 0 to VDD IOL = 8 mA - -
to(f)
output fall time
4.57
5.20
ns
P1.4, P1.5 (OPEN-DRAIN) (PINS 51, 52) VIL VIH Vhys ILI VOL to(f) LOW-level input voltage HIGH-level input voltage Schmitt trigger input hysteresis voltage input leakage current LOW-level output voltage output fall time - - - - - 1.08 - 0.60 0.13 0.35 103.30 V V V A V ns
between 10% and 69.70 83.67 90%; CL = 70 pF
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
SAA5264; SAA5265
SYMBOL Analog inputs
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
CVBS0 AND CVBS1(PINS 23 AND 24) Vsync Vi(v)(p-p) Zsource VIH Ci RIREF sync voltage amplitude video input voltage (peak-to-peak value) source impedance HIGH-level input voltage input capacitance 0.1 0.7 0 3.0 - resistor tolerance = 2% - 0.3 1.0 - - - 24 0.6 1.4 250 VDDA +0.3 10 - V V V pF
IREF (PIN 26) resistance from IREF to VSSA HIGH-level input voltage input capacitance k
ADC0 TO ADC3 (PINS 9 TO 12) VIH Ci - - - - VDDA 10 V pF
Analog outputs B, G AND R (PINS 32 TO 34) Io(bl) Io(max) output current (black level) output current (maximum intensity) output current (70% of maximum intensity) load resistance (to VSSA) load capacitance VDDA = 3.3 V VDDA = 3.3 V intensity level code = 15 (Dec) VDDA = 3.3 V intensity level code = 0 (Dec) resistor tolerance = 5% -10 6.0 - 6.67 +10 7.3 A mA
Io(70%max)
4.2
4.7
5.1
mA
RL CL
- -
150 -
- 15
pF
Analog input/output SYNC_FILTER (PIN 25) Cstg storage capacitor (to VSSA) - 0.35 100 0.55 - 0.75 nF V
Vsync(nom) sync filter level voltage with nominal sync amplitude
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
SAA5264; SAA5265
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Crystal oscillator XTALIN (PIN 41) VIL VIH Ci Co fxtal(nom) CL Cmot Rxtal Cosc Cxtal(hold) Txtal Xj Xd Notes 1. Periphery supply current is dependent on I/O external components and voltage levels. 2. Crystal order number 4322 143 05561. If crystal 4322 143 05561 is not used, then the formulae in the crystal specification should be used. 3. Cosc may need to be reduced from the initially selected value. Cchip = 7 pF, the mean of the capacitances due to the chip at XTALIN and at XTALOUT. Cstray is a value for the mean of the stray capacitances due to the external circuit at XTALIN and XTALOUT. The maximum value for Cxtal(hold) is to ensure start-up. LOW-level input voltage HIGH-level input voltage input capacitance VSSA - - - fundamental mode Tamb = 25 C Tamb = 25 C Tamb = 25 C Tamb = 25 C - - - - - - -20 Tamb = 25 C - - - - - - 12 - - - - VDDA 10 V V pF
XTALOUT (PIN 42) output capacitance 10 - 30 20 60 pF
Crystal specification; notes 2 and 3 nominal frequency load capacitance motional capacitance crystal resonance resistance capacitance at XTALIN, XTALOUT crystal holder capacitance crystal temperature range adjustment tolerance drift MHz pF fF pF
2C L - C chip - C stray - - +25 - -
C osc C chip C stray 35 - ----------- - ------------- - -------------- pF 2 2 2 +85 50 x 10-6 100 x 10-6 C
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
I2C-BUS CHARACTERISTICS
SAA5264; SAA5265
FAST-MODE I2C-bus SYMBOL fSCL tBUF tHD;STA tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tr tf tSU;STO Cb Notes 1. A device must internally provide a hold time of at least 300 ns for the SDA signal (referenced to the VIHmin of the SCL signal) in order to bridge the undefined region of the falling edge of SCL. 2. The maximum tHD;DAT has only to be met if the device does not stretch the LOW period of the SCL signal (tLOW(SCL)). 3. A fast-mode I2C-bus device can be used in a standard-mode I2C-bus system, but the requirement tSU;DAT 250 ns must then be met. This will automatically be the case if the device does not stretch tLOW(SCL). If such a device does stretch tLOW(SCL), it must output the next data bit to the SDA line tr(max) + tSU;DAT = 1000 + 250 = 1250 ns (according to the standard-mode I2C-bus specification) before the SCL line is released. 4. Cb = total capacitance of one bus line in pF. SCL clock frequency bus free time between a STOP and START condition hold time START condition; after this period, the first clock pulse is generated SCL LOW time SCL HIGH time set-up time repeated START data hold time; notes 1 and 2 data set-up time; note 3 rise time SDA and SCL; note 4 fall time SDA and SCL; note 4 set-up time STOP condition capacitive load of each bus line PARAMETER MIN. 0 1.3 0.6 1.3 0.6 0.6 0 100 20 20 0.6 - - - - - - 0.9 - 300 300 - 400 MAX. 400 kHz s s s s s s ns ns ns s pF UNIT
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
EMC GUIDELINES Optimization of circuit return paths and minimization of common mode emission will be assisted by using a double sided Printed Circuit Board (PCB) with low inductance ground plane. On a single-sided PCB a local ground plane under the whole IC should be present as shown in Fig.3. This should have the widest possible connection between the PCB ground and bulk electrolytic decoupling capacitor. Preferably, the PCB local ground plane connection should not be connected to other grounds on route to the PCB ground. Do not use wire links. Wire links cause ground inductance which increases ground bounce. The supply pins can be decoupled at the ground pin plane below the IC. This is easily achieved by using surface mount capacitors, which, at high frequency, are more effective than components with leads.
SAA5264; SAA5265
Using a device socket would increase the area and therefore increase the inductance of the external bypass loop. To provide a high-impedance to any high frequency signals on the VDD supplies to the IC, a ferrite bead or inductor can be connected in series with the supply line close to the decoupling capacitor. To prevent signal radiation, pull-up resistors of signal outputs should not be connected to the VDD supply on the IC side of the ferrite bead or inductor. OSCGND should only be connected to the crystal load capacitors and not to any other ground connection. Distances to physical connections of associated active devices should be as short as possible. PCB output tracks should have close proximity, mutually coupled, ground return paths.
handbook, full pagewidth
GND +3.3 V
electrolytic decoupling capacitor (2 F)
other GND connections VDDC VDDP VDDA VSSP
ferrite beads
SM decoupling capacitors (10 to 100 nF)
under-IC GND plane GND connection note: no wire links
under-IC GND plane
VSSC
VSSA
IC
MBK979
Fig.3 Power supply connections for EMC.
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
QUALITY AND RELIABILITY
SAA5264; SAA5265
This device will meet Philips Semiconductors general quality specification for business group "Consumer Integrated Circuits SNW-FQ-611-Part E". The principal requirements are shown in Tables 4 to 7. Group A Table 4 Acceptance tests per lot; note 1 TEST Mechanical Electrical Note 1. ppm = fraction of defective devices, in parts per million. Group B Table 5 Processability tests (by package family) TEST Solderability Mechanical Solder heat resistance Group C Table 6 Reliability tests (by package family); note 1 TEST Operational life Humidity life CONDITIONS REQUIREMENTS <1000 FPM at Tj = 150 C <2000 FPM <2000 FPM 0/16 on all lots 0/15 on all lots 0/15 on all lots REQUIREMENTS REQUIREMENTS cumulative target: <80 ppm cumulative target: <100 ppm
168 hours at Tj = 150 C temperature, humidity, bias 1000 hours; Tamb = 85 C, 85% RH (or equivalent test) Temperature cycling performance Tstg(min) to Tstg(max) Note 1. FPM = fraction of devices failing at test condition, in Failures Per Million. Table 7 Reliability tests (by device type) TEST ESD and latch-up CONDITIONS ESD Human body model 100 pF, 1.5 k ESD Machine model 200 pF, 0 latch-up
REQUIREMENTS 2000 V 200 V 100 mA, 1.5 x VDD (absolute maximum)
2000 Jan 27
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VDD P2.0/PWM P2.1/PWM0 P2.2/PWM1 P2.3/PWM2 user ports P2.4/PWM3 P2.5/PWM4 P2.6/PWM5 P2.7/PWM6 P3.0/ADC0 P3.1/ADC1 VDD A0 A1 A2 VSS EEPROM VDD RC P3.2/ADC2 P3.3/ADC3 VSSC SCL(NVRAM) SDA(NVRAM) P0.2 P0.3 VDD 1 k 1 k P0.4 P0.5 P0.6 P0.7 VSSA CVBS CVBS 100 nF 100 nF CVBS0 CVBS1 SYNC_FILTER IREF 100 nF 24 k 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
APPLICATION INFORMATION
Philips Semiconductors
10 and 1 page intelligent teletext decoders
PCF8582E SCL
SDA
SAA5264 SAA5265
handbook, full pagewidth
VDD
52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
P1.5 P1.4 SDA SCL P1.3 P1.2 P1.1 P1.0 VDDP RESET XTALOUT XTALIN OSCGND VDDC VSSP VSYNC HSYNC VDS R G B VDDA P3.4/PWM7 COR TEST FRAME VDD 150 VDD VDD field flyback line flyback 12 MHz 56 pF 100 nF 47 F VDD 10 F VDD VDD SDA SCL
17
SAA5264; SAA5265
GSA035
Preliminary specification
Bi-directional ports have been configured as open-drain. Output ports have been configured as push-pull.
Fig.4 Application diagram.
Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
PACKAGE OUTLINE SDIP52: plastic shrink dual in-line package; 52 leads (600 mil)
SAA5264; SAA5265
SOT247-1
seating plane
D
ME
A2
A
L
A1 c Z e b1 wM (e 1) MH b 52 27
pin 1 index E
1
26
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT247-1 REFERENCES IEC JEDEC MS-020 EIAJ EUROPEAN PROJECTION A max. 5.08 A1 min. 0.51 A2 max. 4.0 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 47.9 47.1 E (1) 14.0 13.7 e 1.778 e1 15.24 L 3.2 2.8 ME 15.80 15.24 MH 17.15 15.90 w 0.18 Z (1) max. 1.73
ISSUE DATE 95-03-11 99-12-27
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
SOLDERING Introduction to soldering through-hole mount packages This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds.
SAA5264; SAA5265
The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. suitable suitable(1) WAVE
2000 Jan 27
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Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
SAA5264; SAA5265
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
2000 Jan 27
20
Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
NOTES
SAA5264; SAA5265
2000 Jan 27
21
Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
NOTES
SAA5264; SAA5265
2000 Jan 27
22
Philips Semiconductors
Preliminary specification
10 and 1 page intelligent teletext decoders
NOTES
SAA5264; SAA5265
2000 Jan 27
23
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
753504/02/pp24
Date of release: 2000
Jan 27
Document order number:
9397 750 06789

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